文件下载与邀请翻译者

学习英特尔开发手册，最好手里这个手册文件。原版是PDF文件。点击下方链接了解下载方法。

讲解下载英特尔开发手册的文章

翻译英特尔开发手册，会是一件耗时费力的工作。如果有愿意和我一起来做这件事的，那么，欢迎你的加入。

另外，我不仅仅是打算翻译这一种手册，以后，可能还需要去翻译许多的英文技术文档，以支持系统底层的教学，培养系统底层程序员。

我有钱了以后，应该是会出私钱来请人翻译一批英文技术文档。当前，暂时没钱，若是有志愿加入的，欢迎啊。

本节翻译

【正文】Chapter 11 — SSE and SSE2 System Programming. Describes those aspects of SSE and SSE2 extensions that must be handled and considered at the system programming level, including task switching, exception handling, and compatibility with existing system environments.

【翻译】第11章- SSE和SSE2系统编程。描述SSE和SSE2扩展中必须在系统编程级别处理和考虑的那些方面，包括任务切换、异常处理和与现有系统环境的兼容性。

【正文】Chapter 12 — System Management. Describes the IA-32 architecture’s system Management mode (SMM) and the thermal monitoring facilities.
Chapter 13 — Machine-Check Architecture. Describes the machine-check architecture.

【翻译】第十二章-系统管理。介绍了IA-32架构的系统管理模式(SMM)和热监控设施。
第13章-机器检查架构。描述机器检查体系结构。

【正文】Chapter 14 — Debugging and Performance Monitoring. Describes the debugging Registers and other debug mechanism provided in the IA-32 architecture. This chapter also describes the time-stamp counter and the performance-monitoring counters.
Chapter 15 — 8086 Emulation. Describes the real-address and virtual-8086 modes of the IA-32 architecture. 
Chapter 16 — Mixing 16-Bit and 32-Bit Code. Describes how to mix 16-bit and 32-bit code modules within the same program or task.

【翻译】第14章-调试和性能监控。描述IA-32架构中提供的调试寄存器和其他调试机制。本章还介绍了时间戳计数器和性能监控计数器。
第15章- 8086仿真。介绍了IA-32架构的实地址和虚拟8086模式。
第16章-混合16位和32位代码。描述如何在同一程序或任务中混合使用16位和32位代码模块。

【正文】Chapter 17 — IA-32 Architecture Compatibility. Describes architectural compatibility among the IA-32 processors, which include the Intel 286, Intel386™, Intel486™, Pentium, P6 family, Pentium 4, and Intel Xeon processors. The P6 family includes the Pentium Pro, Pentium II, and Pentium III processors. The Pentium 4 and Xeon processors are the first of a family of IA-32 processors based on the new Intel NetBurst micro-architecture. The differences among the 32-bit IA-32 processors are also described throughout the three volumes of the IA-32 Software Developer’s Manual, as relevant to particular features of the architecture. This chapter provides a collection of all the relevant compatibility information for all IA-32 processors and also describes the basic differences with respect to the 16-bit IA-32 processors (the Intel 8086 and Intel 286 processors).

【翻译】第17章- IA-32架构兼容性。描述IA-32处理器之间的架构兼容性，包括Intel 286、Intel386™、Intel486™、Pentium、P6系列、Pentium 4和Intel Xeon处理器。P6系列包括Pentium Pro、Pentium II和Pentium III处理器。奔腾4和至强处理器是基于新英特尔NetBurst微架构的IA-32处理器家族中的第一款。32位IA-32处理器之间的差异也在IA-32软件开发人员手册的三卷中描述，作为与体系结构的特定特性相关的内容。本章提供了所有IA-32处理器的所有相关兼容性信息的集合，并描述了16位IA-32处理器(Intel 8086和Intel 286处理器)的基本差异。

【正文】Appendix A — Performance-Monitoring Events. Lists the events that can be counted with the performance-monitoring counters and the codes used to select these events. Both Pentium processor and P6 family processor events are described. 
Appendix B — Model Specific Registers (MSRs). Lists the MSRs available in the Pentium processors, the P6 family processors, and the Pentium 4 and Intel Xeon processors and describes their functions.

【翻译】附录A -性能监控事件。列出可以使用性能监视计数器计数的事件以及用于选择这些事件的代码。描述了奔腾处理器和P6系列处理器事件。
附录B -型号专用寄存器(MSRs)。列出Pentium处理器、P6系列处理器、Pentium 4和Intel Xeon处理器中可用的msr及其功能。

【正文】Appendix C — Multiple-Processor (MP) Bootup Sequence Example (Specific to P6 Family Processors). Gives an example of how to use of the MP protocol to boot two P6 family processors in a multiple-processor (MP) system and initialize their APICs.
Appendix D — Programming the LINT0 and LINT1 Inputs. Gives an example of how to program the LINT0 and LINT1 pins for specific interrupt vectors.

【翻译】附录C -多处理器(MP)启动顺序示例(特定于P6系列处理器)。给出了如何使用MP协议在多处理器(MP)系统中引导两个P6系列处理器并初始化它们的apic的示例。
附录D -编程LINT0和LINT1输入。给出了如何为特定中断向量编程LINT0和LINT1引脚的示例。

【正文】Appendix E — Interpreting Machine-Check Error Codes. Gives an example of how to interpret the error codes for a machine-check error that occurred on a P6 family processor.
Appendix F — APIC Bus Message Formats. Describes the message formats for Messages transmitted on the APIC bus for P6 family and Pentium processors.

【翻译】附录E -解释机器检查错误码。给出了如何解释P6系列处理器上发生的机器检查错误的错误代码的示例。
附录F - APIC总线消息格式。描述P6系列和Pentium处理器在APIC总线上传输的消息的消息格式。

结束语

本节内容，我觉得还可以。