LTspice: Models of ISO 7637-2 & ISO 16750-2 Transients
Introduction
Simulating the ISO 7637-2 and ISO 16750-2 transients early in the design phase of an automotive product can pinpoint issues that would otherwise come to light during electromagnetic compatibility (EMC) testing. If a product fails EMC testing, hardware modifications are required, project schedules suffer, and extra costs result from repeated testing on the new hardware. Spending a few minutes, or hours, simulating the protection circuitry in LTspice helps to avoid expensive hardware respins due to EMC failures.
ISO 7637-2 and ISO 16750-2 are the most common specifications encountered by engineers who design automotive electronics. These two specifications describe potentially destructive transients and the recommended test procedures to ensure that the electronics are suitably protected. More information about these specifications can be found in the following article:
In addition to reviewing the above article, it is recommended that anyone dealing with these specifications purchase copies from the International Organization for Standardization (ISO) or American National Standards Institute (ANSI):
For each transient condition in the ISO 16750-2 and ISO 7637-2 specifications, a “Class” of operation is suggested with “Class A” the most stringent requirement and “Class E” the least stringent. The definitions of Class A through Class E are provided in the ISO 16750-1:2006 specification, and they are also included at end of this document for easy reference. Appendix: ISO 16750-1:2006 §6 Functional Status Classification.
Simulating Transients
Simulating the ISO 7637-2 and ISO 16750-2 transients early in the design stage can highlight potential issues before they result in costly failures during ISO 7637-2 and ISO 16750-2 testing. The ISO16750-2 and ISO7637-2 symbols in LTspice simplify this task by providing a nearly complete set of ISO 7637-2 and ISO 16750-2 transients.
When using these symbols in an LTspice schematic, the test condition can be selected by right-clicking on the symbol and then double-clicking on the “SpiceModel” field to open a drop-down menu like the one shown below.
Because the requirements are different for devices that operate from 12V supplies and 24V supplies, separate models are provided for each. The models that correspond to 12V supplies have a “_12V” in their name, and those that correspond to 24V supplies have “_24V” in the name. .
Since many automotive manufacturers maintain their own specifications independent from the International Organization for Standardization, these symbols have been created with parameters that allow customization through the “Value” field, as shown below. The parameters for each waveform are described in the sections that follow.
For all of the following conditions, there is a t0 parameter that defines when the condition will be applied. It is not part of the ISO 7637-2 or ISO 16750-2 specifications; it is only used for the LTspice model.
ISO 7637-2:2011 Pulse 1
Pulse 1 describes the negative transient observed by electronics connected in parallel with an inductive load when the connection to the power supply is interrupted.
| Parameter |
ISO 7637-2: 2011 Nominal 12V |
ISO7637-2: Pulse1 12V (LTspice Default) |
ISO 7637-2: 2011 Nominal 24V |
ISO7637-2: Pulse1 24V (LTspice Default) |
| Ua (V) | 13.5±0.5 | 13.5 | 27±0.5 | 27 |
| Us (V) | –75 to –150 | –150 | –300 to –600 | –600 |
| Ri (Ω) | 10 | 10 | 50 | 50 |
| td (s) | 2m | 2m | 1m | 1m |
| tr (s) | 0.5u to 1u | 1u | 1.5u to 3u | 3u |
| t1 (s) | >0.5 | 0.5 | >0.5 | 0.5 |
| t2 (s) | 200m | 200m | 200m | 200m |
| t3 (s) | <100u | 50u | <100u | 50u |
| t0 (s) | 1m | 1m |
Requirement: Pulse 1 must be repeated a minimum of 500 times. Class A through Class E operation is negotiated between the vehicle manufacturer and the equipment supplier. Since the power is effectively removed during the test, it is usually defined as Class A if the equipment returns to normal operation without user intervention after power is reapplied.
ISO 7637-2 Pulse 1 Example Circuit
ISO 7637-2:2011 Pulse 2a
Pulse 2a describes the positive voltage spike that may occur when current is interrupted to a circuit in parallel with the electronics being tested. If current is built up in the wiring harness, when a device suddenly stops sinking current, the energy stored in the wiring harness inductance may cause a voltage spike. The energy of this positive spike is limited by the series resistance.
| Parameter |
ISO 7637-2: 2011 Nominal 12V |
ISO7637-2: Pulse2a 12V (LTspice Default) |
ISO 7637-2: 2011 Nominal 24V |
ISO7637-2: Pulse2a 24V (LTspice Default) |
| Ua (V) | 13.5±0.5 | 13.5 | 27±0.5 | 27 |
| Us (V) | +37 to +112 | 112 | +37 to +112 | 112 |
| Ri (Ω) | 2 | 2 | 2 | 2 |
| td (s) | 0.05m | 0.05m | 0.05m | 0.05m |
| tr (s) | 0.5u to 1u | 1u | 0.5u to 1u | 1u |
| t1 (s) | 0.2 to 5 | 0.2 | 0.2 to 5 | 0.2 |
| t0 (s) | 1m | 1m |
Requirement: Pulse 2a must be repeated a minimum of 500 times. Class A through Class E operation is negotiated between the vehicle manufacturer and the equipment supplier, typically Class A.
ISO 7637-2: Pulse 2a Example Circuit
ISO 7637-2:2011 Pulse 2b
Pulse 2b defines a situation that occurs when the ignition is switched off and DC motors act as generators. For example, if the heater is running when the driver turns off the car, for a short time the blower motor can supply DC power to the system while it spins down.
| Parameter |
ISO 7637-2: 2011 Nominal 12V |
ISO7637-2: Pulse2b 12V (LTspice Default) |
ISO 7637-2: 2011 Nominal 24V |
ISO7637-2: Pulse2b 24V (LTspice Default) |
| Ua (V) | 13.5±0.5 | 13.5 | 27±0.5 | 27 |
| Us (V) | 10 | 10 | 20 | 20 |
| Ri (Ω) | 0 to 0.05 | 0.05 | 0 to 0.05 | 0.05 |
| td (s) | 0.2 to 2 | 0.2 | 0.2 to 2 | 0.2 |
| t12 (s) | 1m±0.5m | 1m | 1m±0.5m | 1m |
| tr (s) | 1m±0.5m | 1m | 1m±0.5m | 1m |
| t6 (s) | 1m±0.5m | 1m | 1m±0.5m | 1m |
| trep (s) | 0.5 to 5 | 5 | 0.5 to 5 | 5 |
| ton (s) | 1 | 1 | ||
| t0 (s) | 1m | 1m |
Requirement: Pulse 2b must be repeated a minimum of 10 times. Class A through Class E operation is negotiated between the vehicle manufacturer and the equipment supplier. Since the power is effectively removed during the test, it is usually defined as Class A if the equipment returns to normal operation without user intervention after power is reapplied.
ISO 7637-2: Pulse 2b Example Circuit
ISO 7637-2:2011 Pulse 3a
Pulse 3a defines the negative spikes that may occur as a result of switching processes including arcing across switches and relays. For this specification, the energy is limited by a 50Ω series resistance.
| Parameter |
ISO 7637-2: 2011 Nominal 12V |
ISO7637-2: Pulse3a 12V (LTspice Default) |
ISO 7637-2: 2011 Nominal 24V |
ISO7637-2: Pulse3a 24V (LTspice Default) |
| Ua (V) | 13.5±0.5 | 13.5 | 27±0.5 | 27 |
| Us (V) | –150 to –300 | –300 | –112 to –220 | –220 |
| Ri (Ω) | 50 | 50 | 50 | 50 |
| td (s) | 150n±45n | 150n | 150n±45n | 150n |
| tr (s) | 5n±1.5n | 5n | 5n±1.5n | 5n |
| t1 (s) | 100u | 100u | 100u | 100u |
| t4 (s) | 10m | 10m | 10m | 10m |
| t5 (s) | 90m | 90m | 90m | 90m |
| t0 (s) | 1m | 1m |
Requirement: Pulse 3a should be applied repetitively for one hour. Class A through Class E operation is negotiated between the vehicle manufacturer and the equipment supplier, typically Class A.
ISO 7637-2:Pulse 3a Example Circuit
ISO 7637-2:2011 Pulse 3b
Pulse 3b defines the positive spikes that may occur as a result of switching processes including arcing across switches and relays. For this specification, the energy is limited by a 50Ω series resistance.
| Parameter |
ISO 7637-2: 2011 Nominal 12V |
ISO7637-2: Pulse3b 12V (LTspice Default) |
ISO 7637-2: 2011 Nominal 24V |
ISO7637-2: Pulse3b 24V (LTspice Default) |
| Ua (V) | 13.5±0.5 | 13.5 | 27±0.5 | 27 |
| Us (V) | +75 to +150 | 150 | +150 to +300 | 300 |
| Ri (Ω) | 50 | 50 | 50 | 50 |
| td (s) | 150n±45n | 150n | 150n±45n | 150n |
| tr (s) | 5n±1.5n | 5n | 5n±1.5n | 5n |
| t1 (s) | 100u | 100u | 100u | 100u |
| t4 (s) | 10m | 10m | 10m | 10m |
| t5 (s) | 90m | 90m | 90m | 90m |
| t0 (s) | 1m | 1m |
Requirement: Pulse 3b should be applied repetitively for one hour. Class A through Class E operation is negotiated between the vehicle manufacturer and the equipment supplier, typically Class A.
ISO 7637-2: Pulse 3b Example Circuit
ISO 16750-2:2012 §4.2 Direct Current Supply Voltage
Section 4.2 of ISO 16750-2 defines the minimum and maximum supply voltages. The specification defines multiple “codes” for the minimum supply voltage, and the appropriate code for the supply voltage is negotiated between the vehicle manufacturer and equipment supplier. No LTspice model is provided for this model because it is simply a constant voltage, but the conditions are listed below for easy reference.
| Bandwidth |
ISO 16750-2: 2012 Nominal 12V |
ISO 16750-2: 2012 Nominal 24V |
| Usmax(V) |
Code A: 6V Code B: 8V Code C: 9V Code D: 10.5V |
Code E: 10V Code F: 16V Code G: 22V Code H: 18V |
| Usmax (V) | 16 | 32 |
Requirement: Class A (continuous operation).
ISO 16750-2:2012 §4.3 Overvoltage
Section 4.3 of ISO 16750-2 describes “Overvoltage” requirements. The first requirement lasts for 60 minutes and simulates the condition where the voltage regulator has failed. For 12V systems, 18V is applied; for 24V systems, 36V is applied. Depending on the application, it might not be necessary for the equipment to operate normally while the test is performed, but it must return to normal operation after the test condition is removed. The second test condition only applies to 12V systems and simulates a jump-start with 24V applied for 60 seconds. Once again, it may not be necessary for the equipment to operate normally during the test.
No LTspice model is provided for this condition since it is simply a voltage source.
Requirement: See ISO 16750-2:2012 specification.
ISO 16750-2:2012 §4.4 Superimposed Alternating Voltage
Section 4.4 provides test conditions to “simulate a residual alternating current on the direct current supply.” During this test, an AC voltage with series impedance between 50mΩ and 100mΩ is swept from 50Hz to 25kHz multiple times. The upper peaks of the voltage are 16V for a 12V system and 32V for a 24V system. The peak to peak voltage is defined by the “severity level” as listed below, and the frequency is swept five times logarithmically, triangular, over 10 minutes.
| Parameter |
ISO 16750-2: 2012 Nominal 12V |
ISO16750-2: 4-4 12V (LTspice Default) |
ISO 16750-2: 2012 Nominal 24V |
ISO16750-2: 4-4 24V (LTspice Default) |
| Umax (V) | 16 | 16 | 32 | 32 |
| Upp (V) |
Severity 1: 1V Severity 2: 4V Severity 3: N/A Severity 4: 2V |
4 |
Severity 1: 1V Severity 2: 4V Severity 3: 10V Severity 4: N/A |
10 |
| Ri (Ω) | 50m to 100m | 50m | 50m to 100m | 50m |
Requirement: Class A
ISO16750-2: 4-4 Superimposed Alternating Voltage Example Circuit
ISO 16750-2:2012 §4.5 Slow Decrease and Increase of Supply Voltage
Section 4.5 “Slow decrease and increase of supply voltage” simulates a battery being slowly discharged and then recharged. The test begins with the supply voltage at Usmin, the minimum supply voltage, before it is discharged to 0V at a rate of 0.5V/minute. After reaching 0V, the supply is brought back up to Usmin at the same rate.
In ISO 16750-2, Usmin, the minimum supply voltage, is identified by Code A through Code E in Section 4.2 of the specification. These codes are reproduced below for easy reference.
Obviously, it is not necessary to operate continuously, but this test verifies that the hardware does not fail.
| Parameter |
ISO 16750-2:2012 Nominal 12V |
ISO16750-2: 4-5 12V (LTspice Default) |
ISO 16750-2:2012 Nominal 24V |
ISO16750-2: 4-5 24V (LTspice Default) |
| Usmin (V) |
Code A: 6V Code B: 8V Code C: 9V Code D: 10.5V |
6 |
Code E: 10V Code F: 16V Code G: 22V Code H: 18V |
10 |
| t0 (s) | 1m | 1m |
Requirement: See ISO 16750-2:2012 specification.
ISO16750-2: 4-5 Slow Decrease and Increase of Supply Voltage Example Circuit
ISO 16750-2:2012 §4.6.1 Discontinuities in Supply Voltage
Section 4.6.1 “Discontinuities in supply voltage” attempts to simulate a failure in another circuit that causes the supply to dip until the other circuit’s fuse blows open. In this test, the supply starts at Usmin, the minimum supply voltage, then dips for 100ms, and finally recovers to Usmin. The rise time and fall time of the dip and recovery are faster than 10ms. For 12V systems, the supply dips to 4.5V, and for 24V systems it dips to 9V.
In ISO 16750-2, Usmin, the minimum supply voltage, is identified by Code A through Code E in Section 4.2 of the specification. These codes are reproduced below for easy reference.
In the simulation, the supply dips at the 10 second timepoint of the simulation.
| Parameter |
ISO 16750-2:2012 Nominal 12V |
ISO16750-2: 4-6-1 12V (LTspice Default) |
ISO 16750-2:2012 Nominal 24V |
ISO16750-2: 4-6-1 24V (LTspice Default) |
| Usmin (V) |
Code A: 6V Code B: 8V Code C: 9V Code D: 10.5V |
6 |
Code E: 10V Code F: 16V Code G: 22V Code H: 18V |
10 |
Requirement: Class B. The vehicle manufacturer and the equipment supplier may agree that a reset is allowed.
ISO16750-2: 4-6-1 12V Momentary Drop In Supply Voltage Example Circuit
ISO 16750-2:2012 §4.6.2 Reset Behavior at Voltage Drop
Section 4.6.2 “Reset behavior at voltage drop” specifies a series of 5-second supply dips, with each pulse at a lower voltage than the previous one. The purpose is to verify that the device resets properly following a supply dip. During the test, each 5-second dip is 5% lower than the previous one, and it recovers to Usmin for at least 10 seconds between each dip.
In ISO 16750-2, Usmin, the minimum supply voltage, is identified by Code A through Code E in Section 4.2 of the specification. These codes are reproduced below for easy reference.
| Parameter |
ISO 16750-2:2012 Nominal 12V |
ISO16750-2: 4-6-2 12V Reset Behaviour At Voltage Drop (LTspice Default) |
ISO 16750-2:2012 Nominal 24V |
ISO16750-2: 4-6-2 24V (LTspice Default) |
| Usmin (V) |
Code A: 6V Code B: 8V Code C: 9V Code D: 10.5V |
6 |
Code E: 10V Code F: 16V Code G: 22V Code H: 18V |
10 |
Requirement: Class C.
ISO 16750-2:2012 §4.6.3 Starting Profile
Section 4.6.3 specifies a waveform representative of a vehicle’s starting profile. It is applied to the device being tested 10 times. The exact voltages and durations required depend on the desired Level I, II, III or IV, which is determined by the application.
| Parameter |
ISO 16750-2:2012 Nominal 12V |
ISO16750-2: 4-6-3 12V Starting Profile (LTspice Default) |
ISO 16750-2:2012 Nominal 24V |
ISO16750-2: 4-6-3 24V (LTspice Default) |
| Ub (V) |
12±0.2 |
12 |
24±0.2 |
24 |
| Us6 (V) |
Level I: 8V Level II: 4.5V Level III: 3V Level IV: 6V |
6 |
Level I: 10V Level II: 8V Level III: 6V |
6 |
| Us (V) |
Level I: 9.5V Level II: 6.5V Level III: 5V Level IV: 6.5V |
6.5 |
Level I: 20V Level II: 15V Level III: 10V |
10 |
| tf (s) | 5m±0.5m | 5m | 10m±1m | 10m |
| t6 (s) | 15m±1.5m | 15m | 50m±5m | 50m |
| t7 (s) | 50m±5m | 50m | 50m±5m | 50m |
| t8 (s) |
Level I: 1000m±100m Level II: 10000m±1000m Level III: 1000m±100m Level IV: 10000m±1000m |
10000m |
Level I: 1000m±100m Level II: 10000m±1000m Level III: 1000m±100m |
1000m |
| tr (s) |
Level I: 40m±4m Level II: 100m±10m Level III: 100m±10m Level IV: 100m±10m |
100m |
Level I: 40m±4m Level II: 100m±10m Level III: 40m±10m |
40m |
| Ri (Ω) | 10m | 10m | ||
| t0 (s) | 1 | 1m |
Requirement: See ISO 16750-2:2012 specification.
ISO 16750-2:2012 §4.6.4 Load Dump Without Centralized Load Dump Suppression – Test A
Section 4.6.4.2.2 “Test A – without centralized load dump suppression” specifies a transient that occurs when the alternator is charging a battery, and the battery connection is lost. “Without centralized load dump suppression” signifies that the alternator does not contain clamp diodes. For an alternator with clamp diodes, use Test B instead. If you are unfamiliar with this distinction, see a more detailed description in the article:
| Parameter |
ISO 16750-2:2012 Nominal 12V |
ISO16750-2: 4-6-4 12V Load Dump Without Suppression TestA (LTspice Default) |
ISO 16750-2:2012 Nominal 24V |
ISO16750-2: 4-6-4 24V TestA (LTspice Default) |
| Ua (V) | 14±0.2 | 14 | 28±0.2 | 28 |
| Us (V) | 79 to 101 | 101 | 151 to 202 | 202 |
| Ri (Ω) | 0.5 to 4 | 0.5 | 1 to 8 | 1 |
| td (s) | 40m to 400m | 100m to 350m | ||
| tr (s) | 5m to 10m | 5m to 10m | ||
| t0 (s) | 1 | 1 |
Requirement: Ten pulses at 1 minute intervals. Class C.
16750-2:2012 §4.6.4 Load Dump With Centralized Load Dump Suppression – Test B
Section 4.6.4.2.2 “Test B – with centralized load dump suppression” specifies a transient that occurs when the alternator is charging a battery, and the battery connection is lost. “With centralized load dump suppression” signifies that the alternator contains clamp diodes. For an alternator without clamp diodes, use Test A instead. If you are unfamiliar with this distinction, see a more detailed description in the article:
| Parameter |
ISO 16750-2:2012 Nominal 12V |
ISO16750-2: 4-6-4 12V Load Dump With Suppression Test B (LTspice Default) |
ISO 16750-2:2012 Nominal 24V |
ISO16750-2: 4-6-4 24V Load Dump With Suppression Test B (LTspice Default) |
| Ua (V) | 14±0.2 | 14 | 28±0.2 | 28 |
| Us (V) | 79 to 101 | 101 | 151 to 202 | 202 |
| UsClamp (V) | 35 | 35 | (58 typical) | 58 |
| Ri (Ω) | 0.5 to 4 | 0.5 | 1 to 8 | 1 |
| td (s) | 40m to 400m | 100m to 350m | ||
| tr (s) | 5m to 10m | 5m to 10m | ||
| t0 (s) | 1 | 1 |
Requirement: Five pulses at 1 minute intervals. Class C.
ISO 16750-2:2012 §4.7 Reversed Voltage
Section 4.7 of ISO 16750-2 describes “Reversed voltage” or what most automotive engineers simply refer to as “Reverse Battery.” As you would expect, this covers the human error scenario where someone connects a battery with the polarity reversed. “Case 2” is simulated here, which requires that a reverse test voltage be applied at all inputs for 60 seconds to ensure that the system survives without damage.
An alternative test condition, “Case 1”, is also allowed by ISO 16750-2 for 12V systems if no fuse is present in series with the alternator and the alternator’s rectifier diodes limit the voltage by conducting the substantial current delivered by the reverse connected battery. When Case 1 is used, a 4V reverse voltage is applied for 60 seconds.
| Parameter |
ISO 16750-2:2012 Nominal 12V |
ISO16750-2: 4-7 12V Reversed Voltage Case2 (LTspice Default) |
ISO 16750-2:2012 Nominal 24V |
ISO16750-2: 4-7 24V Reversed Voltage Case2 (LTspice Default) |
| Ua (V) | 14 | 14 | 28 | 28 |
Requirement: Class A after replacing blown fuse-links.
ISO 16750-2:2012 §4.9 Open Circuit Tests
Section 4.9 covers “line interruption” tests and describes procedures to ensure that a device resumes normal operation after a connection is removed and then restored. During this test, the circuit is opened for 10 seconds and then restored. Section 4.9 also includes “multiple line interruption” requirements which is not covered here.
| Parameter |
ISO 16750-2:2012 Nominal 12V |
ISO16750-2: 4-9-1 12V Single Line Interruption (LTspice Default) |
ISO 16750-2:2012 Nominal 24V |
ISO16750-2: 4-9-1 24V Single Line Interruption (LTspice Default) |
| Ua (V) | 14 | 14 | 28 | 28 |
| t0 (s) | 1 | 1 |
Requirement: Class C.
ISO 16750-2:2012 §4.8, §4.10, §4.11, §4.12, and §4.13 Tests
These sections are not incorporated into the LTspice simulation models since the nature of the tests is beyond the scope of a single predefined model. Of special note is §4.10 Short-Circuit Protection tests, which require connecting each input and output to the maximum supply voltage and ground for 60 seconds. These can be especially challenging, and it is suggested to simulate and test the conditions extensively.
- ISO 16750-2:2012 §4.8 Ground Reference and Supply Offset
- ISO 16750-2:2012 §4.10 Short Circuit Protection
- ISO 16750-2:2012 §4.11 Withstand Voltage
- ISO 16750-2:2012 §4.12 Insulation Resistance
- ISO 16750-2:2012 §4.13 Electromagnetic Compatibility
Conclusion
The ISO16750-2 and ISO7637-2 symbols in LTspice provide simulation models of the transients described by the ISO 7637-2 and ISO 16750-2 specifications. Simulating protection circuitry during the design phase of product development helps to avoid failures that would otherwise occur during the EMC testing of hardware. Clearly, the effort spent in simulation upfront is worthwhile when one considers the costs incurred by eventual EMC test failures.
Appendix: ISO 16750-1:2006 §6 Functional Status Classification
Class A through Class E operation is defined in ISO 16750-1:2006 as follows:
| Class A | All functions of the device/system perform as designed during and after the test. |
| Class B | All functions of the device/system perform as designed during the test. However, one or more may go beyond the specified tolerance. All functions return automatically to within normal limits after the test. Memory functions shall remain Class A. |
| Class C | One or more functions of a device/system do not perform as designed during the test but return automatically to normal operation after the test. |
| Class D | One or more functions of a device/system do not perform as designed during the test and do not return to normal operation after the test until the device/system is reset by simple “operator/use” action. |
| Class E | One or more functions of a device/system do not perform as designed during and after the test and cannot be returned to proper operation without repairing or replacing the device/system |
Author
Dan Eddleman
Dan Eddleman is an analog engineer with over 15 years of experience at Linear Technology as an IC designer, the Singapore IC Design Center Manager, and an applications engineer.
He began his career at Linear Technology by designing the LTC2923 and LTC2925 Power Supply Tracking Controllers, the LTC4355 High Voltage Dual Ideal Diode-OR, and the LTC1546 Multiprotocol Transceiver. He was also a member of the team that designed the world’s first Power over Ethernet (PoE) Controller, the LTC4255. He holds two patents related to these products.
He subsequently moved to Singapore to manage Linear Technology’s Singapore IC Design Center, overseeing a team of engineers that designed products including Hot Swap controllers, overvoltage protection controllers, DC/DC switched-mode power supply controllers, power monitors, and supercapacitor chargers.
Upon returning to the Milpitas headquarters as an applications engineer, Dan created the Linduino, an Arduino-compatible hardware platform for demonstrating Linear Technology’s I2C- and SPI-based products. The Linduino provides a convenient means to distribute C firmware to customers, while also providing a simple rapid prototyping platform for Linear Technology’s customers.
Additionally, in his role as an applications engineer, he conceived of the LTC2644/LTC2645 PWM to VOUT DACs, and developed the XOR-based address translator circuit used in the LTC4316/LTC4317/LTC4318 I2C/SMBUS Address Translators. He has applied for patents related to both of these products. Dan has also developed multiple reference designs that satisfy the onerous MIL-STD-1275 28V military vehicle specification.
Dan continues to study Safe Operating Area of MOSFETs, and has created software tools and conducts training sessions within Linear Technology related to SOA. His SOAtherm model distributed with LTspice allows customers to simulate MOSFET SOA within their Hot Swap circuit simulations using thermal models that incorporate Spirito runaway.
He received an M.S. in Electrical Engineering from Stanford University and B.S. degrees in Electrical Engineering and Computer Engineering from the University of California, Davis.