A linear feedback shift register is a shift register usually with a few XOR gates to produce the next state of the shift register. A Galois LFSR is one particular arrangement where bit positions with a “tap” are XORed with the output bit to produce its next value, while bit positions without a tap shift. If the taps positions are carefully chosen, the LFSR can be made to be “maximum-length”. A maximum-length LFSR of n bits cycles through 2n-1 states before repeating (the all-zero state is never reached).

The following diagram shows a 5-bit maximal-length Galois LFSR with taps at bit positions 5 and 3. (Tap positions are usually numbered starting from 1). Note that I drew the XOR gate at position 5 for consistency, but one of the XOR gate inputs is 0.

Build this LFSR. The reset should reset the LFSR to 1.

module top_module(
    input clk,
    input reset,    // Active-high synchronous reset to 5'h1
    output [4:0] q
); 

    wire w1,w2,w3,w4,w5;
    always @(posedge clk)
        begin
            if (reset)
                q[0] = 1'b1;
            else
                q[0] = q[1];
        end
//下面对每个模块进行例化
    D_flip ins2(q[2], q[1], clk, reset);
    D_flip ins3(q[0]^q[3], q[2], clk,reset);
    D_flip ins4(q[4], q[3], clk, reset);
    D_flip ins5(0^q[0], q[4], clk, reset);
    
endmodule

//构建D触发器模块
module D_flip(input D, output Q, input clk, input reset);
    always @(posedge clk)
        begin
            if(reset)
                Q <= 1'b0;
            else
            	Q <= D;
        end
endmodule