cadence里面对包含veriloga模型电路进行仿真时有如下问题：
ERROR (OSSHNL-116): Unable to descend into any of the views defined in the view list, 'spectre coms_sch schematic for theinstance 'I8, in cell ‘test’. Either add one of these views to the library INA826 cell ‘comparator’ or modify the view list to contain an existing view.
解答：
应该是你电路里面用了veriloga模型，需要在cadence仿真ADE界面-------进入environment-------switch view list ------添加veriloga